Cryptographic Hardware and Embedded Systems - CHES 2006

Side Channels I.- Template Attacks in Principal Subspaces.- Templates vs. Stochastic Methods.- Towards Security Limits in Side-Channel Attacks.- Low Resources.- HIGHT: A New Block Cipher Suitable for Low-Resource Device.- Invited Talk I.- Integer Factoring Utilizing PC Cluster.- Hardware Attacks and Countermeasures I.- Optically Enhanced Position-Locked Power Analysis.- Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations.- A Generalized Method of Differential Fault Attack Against AES Cryptosystem.- Special Purpose Hardware.- Breaking Ciphers with COPACOBANA –A Cost-Optimized Parallel Code Breaker.- Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware.- Efficient Algorithms for Embedded Processors.- Implementing Cryptographic Pairings on Smartcards.- SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form.- Fast Generation of Prime Numbers on Portable Devices: An Update.- Side Channels II.- A Proposition for Correlation Power Analysis Enhancement.- High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching.- Cache-Collision Timing Attacks Against AES.- Provably Secure S-Box Implementation Based on Fourier Transform.- Invited Talk II.- The Outer Limits of RFID Security.- Hardware Attacks and Countermeasures II.- Three-Phase Dual-Rail Pre-charge Logic.- Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage.- Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style.- Efficient Hardware I.- Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors.- NanoCMOS-Molecular Realization of Rijndael.- Improving SHA-2 Hardware Implementations.- Trusted Computing.- Offline Hardware/Software Authentication for Reconfigurable Platforms.- Side Channels III.- Why One Should Also Secure RSA Public Key Elements.- Power Attack on Small RSA Public Exponent.- Unified Point Addition Formulæ and Side-Channel Attacks.- Hardware Attacks and Countermeasures III.- Read-Proof Hardware from Protective Coatings.- Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits.- Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks.- Invited Talk III.- Challenges for Trusted Computing.- Efficient Hardware II.- Superscalar Coprocessor for High-Speed Curve-Based Cryptography.- Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller.- FPGA Implementation of Point Multiplication on Koblitz Curves Using Kleinian Integers.